On Threshold Circuits for Parity

On Threshold Circuits for Parity Ramamohan Paturi and Michael E. Saks* Department of Computer Science and Engineering University of California, San Diego; La Jolla, Ca 92093 Motivated by the problem of understanding the limitations of neural networks for representing Boolean functions, we consider sizedepth trade-offs for threshold circuits that compute the parity function. We give an almost optimal lower bound on the number of edges of any depth-2 threshold circuit that computes the parity function with polynomially bounded weights. The main technique we use in this proof, which is based upon the theory of rational approximation, appears to be a potentially useful technique for the analysis of such networks. We conjecture that